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rf
adda1.rsadda2.rsadda_reg_ctrl_hw.rscip.rsdfe_ctrl_0.rsdfe_ctrl_1.rsdfe_ctrl_10.rsdfe_ctrl_11.rsdfe_ctrl_12.rsdfe_ctrl_13.rsdfe_ctrl_14.rsdfe_ctrl_15.rsdfe_ctrl_16.rsdfe_ctrl_17.rsdfe_ctrl_18.rsdfe_ctrl_2.rsdfe_ctrl_3.rsdfe_ctrl_4.rsdfe_ctrl_5.rsdfe_ctrl_6.rsdfe_ctrl_7.rsdfe_ctrl_8.rsdfe_ctrl_9.rsfbdv.rslna.rslna_ctrl_hw_mux.rslo.rslo_cal_ctrl_hw1.rslo_cal_ctrl_hw10.rslo_cal_ctrl_hw11.rslo_cal_ctrl_hw2.rslo_cal_ctrl_hw3.rslo_cal_ctrl_hw4.rslo_cal_ctrl_hw5.rslo_cal_ctrl_hw6.rslo_cal_ctrl_hw7.rslo_cal_ctrl_hw8.rslo_cal_ctrl_hw9.rslo_reg_ctrl_hw1.rslo_sdm_ctrl_hw1.rslo_sdm_ctrl_hw2.rslo_sdm_ctrl_hw3.rslo_sdm_ctrl_hw4.rslo_sdm_ctrl_hw5.rslo_sdm_ctrl_hw6.rslo_sdm_ctrl_hw7.rslo_sdm_ctrl_hw8.rslodist.rspa1.rspa2.rspa_reg_ctrl_hw1.rspa_reg_ctrl_hw2.rspa_reg_wifi_ctrl_hw.rspfdcp.rspmip_mv2aon.rsppu_ctrl_hw.rspucr1.rspucr1_hw.rspucr2.rspucr2_hw.rspud_ctrl_hw.rsrbb1.rsrbb2.rsrbb3.rsrbb4.rsrbb_bw_ctrl_hw.rsrbb_gain_index1.rsrbb_gain_index2.rsrbb_gain_index3.rsrbb_gain_index4.rsrbb_gain_index5.rsrf_base_ctrl1.rsrf_base_ctrl2.rsrf_data_temp_0.rsrf_data_temp_1.rsrf_data_temp_2.rsrf_data_temp_3.rsrf_fsm_ctrl0.rsrf_fsm_ctrl1.rsrf_fsm_ctrl2.rsrf_fsm_ctrl_hw.rsrf_fsm_ctrl_sw.rsrf_ical_ctrl0.rsrf_ical_ctrl1.rsrf_ical_ctrl2.rsrf_pkdet_ctrl0.rsrf_resv_reg_0.rsrf_resv_reg_1.rsrf_resv_reg_2.rsrf_rev.rsrf_sram_ctrl0.rsrf_sram_ctrl1.rsrf_sram_ctrl2.rsrf_sram_ctrl3.rsrf_sram_ctrl4.rsrf_sram_ctrl5.rsrf_sram_ctrl6.rsrfcal_ctrlen.rsrfcal_stateen.rsrfcal_status.rsrfcal_status2.rsrfctrl_hw_en.rsrfif_dfe_ctrl0.rsrfif_dig_ctrl.rsrfif_test_read.rsrmxgm.rsrosdac_ctrl_hw1.rsrosdac_ctrl_hw2.rsrrf_gain_index1.rsrrf_gain_index2.rsrxiq_ctrl_hw1.rsrxiq_ctrl_hw2.rsrxiq_ctrl_hw3.rsrxiq_ctrl_hw4.rssaradc_resv.rssdm1.rssdm2.rssdm3.rssingen_ctrl0.rssingen_ctrl1.rssingen_ctrl2.rssingen_ctrl3.rssingen_ctrl4.rstbb.rstbb_gain_index1.rstbb_gain_index2.rstbb_gain_index3.rstbb_gain_index4.rstemp_comp.rsten_ac.rsten_dc.rsten_dig.rstmx.rstosdac_ctrl_hw1.rstosdac_ctrl_hw2.rstosdac_ctrl_hw3.rstosdac_ctrl_hw4.rstrx_gain1.rstrx_gain_hw.rstx_iq_gain_hw0.rstx_iq_gain_hw1.rstx_iq_gain_hw2.rstx_iq_gain_hw3.rstx_iq_gain_hw4.rstx_iq_gain_hw5.rstx_iq_gain_hw6.rstx_iq_gain_hw7.rsvco1.rsvco2.rsvco3.rsvco4.rs
sec_dbg
sec_eng
se_aes_0_ctrl.rsse_aes_0_ctrl_prot.rsse_aes_0_endian.rsse_aes_0_iv_0.rsse_aes_0_iv_1.rsse_aes_0_iv_2.rsse_aes_0_iv_3.rsse_aes_0_key_0.rsse_aes_0_key_1.rsse_aes_0_key_2.rsse_aes_0_key_3.rsse_aes_0_key_4.rsse_aes_0_key_5.rsse_aes_0_key_6.rsse_aes_0_key_7.rsse_aes_0_key_sel_0.rsse_aes_0_key_sel_1.rsse_aes_0_link.rsse_aes_0_mda.rsse_aes_0_msa.rsse_aes_0_sboot.rsse_aes_0_status.rsse_cdet_0_ctrl_0.rsse_cdet_0_ctrl_1.rsse_cdet_0_ctrl_prot.rsse_ctrl_prot_rd.rsse_ctrl_reserved_0.rsse_ctrl_reserved_1.rsse_ctrl_reserved_2.rsse_gmac_0_ctrl_0.rsse_gmac_0_ctrl_prot.rsse_gmac_0_lca.rsse_gmac_0_status.rsse_pka_0_ctrl_0.rsse_pka_0_ctrl_1.rsse_pka_0_ctrl_prot.rsse_pka_0_rw.rsse_pka_0_rw_burst.rsse_pka_0_seed.rsse_sha_0_ctrl.rsse_sha_0_ctrl_prot.rsse_sha_0_endian.rsse_sha_0_hash_h_0.rsse_sha_0_hash_h_1.rsse_sha_0_hash_h_2.rsse_sha_0_hash_h_3.rsse_sha_0_hash_h_4.rsse_sha_0_hash_h_5.rsse_sha_0_hash_h_6.rsse_sha_0_hash_h_7.rsse_sha_0_hash_l_0.rsse_sha_0_hash_l_1.rsse_sha_0_hash_l_2.rsse_sha_0_hash_l_3.rsse_sha_0_hash_l_4.rsse_sha_0_hash_l_5.rsse_sha_0_hash_l_6.rsse_sha_0_hash_l_7.rsse_sha_0_link.rsse_sha_0_msa.rsse_sha_0_status.rsse_trng_0_ctrl_0.rsse_trng_0_ctrl_1.rsse_trng_0_ctrl_2.rsse_trng_0_ctrl_3.rsse_trng_0_ctrl_prot.rsse_trng_0_dout_0.rsse_trng_0_dout_1.rsse_trng_0_dout_2.rsse_trng_0_dout_3.rsse_trng_0_dout_4.rsse_trng_0_dout_5.rsse_trng_0_dout_6.rsse_trng_0_dout_7.rsse_trng_0_status.rsse_trng_0_test.rsse_trng_0_test_out_0.rsse_trng_0_test_out_1.rsse_trng_0_test_out_2.rsse_trng_0_test_out_3.rs
sf_ctrl
spi
timer
tzc_nsec
tzc_sec
uart
bl602_rust_guide
embedded_hal
embedded_time
nb
num
num_complex
num_integer
num_iter
num_rational
num_traits
panic_halt
r0
riscv
riscv_rt
vcell
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//! Pulse Width Modulation

/// Pulse Width Modulation
///
/// # Examples
///
/// Use this interface to control the power output of some actuator
///
/// ```
/// extern crate embedded_hal as hal;
///
/// use hal::prelude::*;
///
/// fn main() {
///     let mut pwm: Pwm1 = {
///         // ..
/// #       Pwm1
///     };
///
///     pwm.try_set_period(1.khz()).unwrap();
///
///     let max_duty = pwm.try_get_max_duty().unwrap();
///
///     // brightest LED
///     pwm.try_set_duty(Channel::_1, max_duty).unwrap();
///
///     // dimmer LED
///     pwm.try_set_duty(Channel::_2, max_duty / 4).unwrap();
/// }
///
/// # use core::convert::Infallible;
/// # struct KiloHertz(u32);
/// # trait U32Ext { fn khz(self) -> KiloHertz; }
/// # impl U32Ext for u32 { fn khz(self) -> KiloHertz { KiloHertz(self) } }
/// # enum Channel { _1, _2 }
/// # struct Pwm1;
/// # impl hal::pwm::Pwm for Pwm1 {
/// #     type Error = Infallible;
/// #     type Channel = Channel;
/// #     type Time = KiloHertz;
/// #     type Duty = u16;
/// #     fn try_disable(&mut self, _: Channel) -> Result<(), Self::Error> { unimplemented!() }
/// #     fn try_enable(&mut self, _: Channel) -> Result<(), Self::Error> { unimplemented!() }
/// #     fn try_get_duty(&self, _: Channel) -> Result<u16, Self::Error> { unimplemented!() }
/// #     fn try_get_max_duty(&self) -> Result<u16, Self::Error> { Ok(0) }
/// #     fn try_set_duty(&mut self, _: Channel, _: u16) -> Result<(), Self::Error> { Ok(()) }
/// #     fn try_get_period(&self) -> Result<KiloHertz, Self::Error> { unimplemented!() }
/// #     fn try_set_period<T>(&mut self, _: T) -> Result<(), Self::Error> where T: Into<KiloHertz> { Ok(()) }
/// # }
/// ```
// unproven reason: pre-singletons API. The `PwmPin` trait seems more useful because it models independent
// PWM channels. Here a certain number of channels are multiplexed in a single implementer.
pub trait Pwm {
    /// Enumeration of `Pwm` errors
    type Error;

    /// Enumeration of channels that can be used with this `Pwm` interface
    ///
    /// If your `Pwm` interface has no channels you can use the type `()`
    /// here
    type Channel;

    /// A time unit that can be converted into a human time unit (e.g. seconds)
    type Time;

    /// Type for the `duty` methods
    ///
    /// The implementer is free to choose a float / percentage representation
    /// (e.g. `0.0 .. 1.0`) or an integer representation (e.g. `0 .. 65535`)
    type Duty;

    /// Disables a PWM `channel`
    fn try_disable(&mut self, channel: Self::Channel) -> Result<(), Self::Error>;

    /// Enables a PWM `channel`
    fn try_enable(&mut self, channel: Self::Channel) -> Result<(), Self::Error>;

    /// Returns the current PWM period
    fn try_get_period(&self) -> Result<Self::Time, Self::Error>;

    /// Returns the current duty cycle
    ///
    /// While the pin is transitioning to the new duty cycle after a `try_set_duty` call, this may
    /// return the old or the new duty cycle depending on the implementation.
    fn try_get_duty(&self, channel: Self::Channel) -> Result<Self::Duty, Self::Error>;

    /// Returns the maximum duty cycle value
    fn try_get_max_duty(&self) -> Result<Self::Duty, Self::Error>;

    /// Sets a new duty cycle
    fn try_set_duty(&mut self, channel: Self::Channel, duty: Self::Duty)
        -> Result<(), Self::Error>;

    /// Sets a new PWM period
    fn try_set_period<P>(&mut self, period: P) -> Result<(), Self::Error>
    where
        P: Into<Self::Time>;
}

/// A single PWM channel / pin
///
/// See `Pwm` for details
pub trait PwmPin {
    /// Enumeration of `PwmPin` errors
    type Error;

    /// Type for the `duty` methods
    ///
    /// The implementer is free to choose a float / percentage representation
    /// (e.g. `0.0 .. 1.0`) or an integer representation (e.g. `0 .. 65535`)
    type Duty;

    /// Disables a PWM `channel`
    fn try_disable(&mut self) -> Result<(), Self::Error>;

    /// Enables a PWM `channel`
    fn try_enable(&mut self) -> Result<(), Self::Error>;

    /// Returns the current duty cycle
    ///
    /// While the pin is transitioning to the new duty cycle after a `try_set_duty` call, this may
    /// return the old or the new duty cycle depending on the implementation.
    fn try_get_duty(&self) -> Result<Self::Duty, Self::Error>;

    /// Returns the maximum duty cycle value
    fn try_get_max_duty(&self) -> Result<Self::Duty, Self::Error>;

    /// Sets a new duty cycle
    fn try_set_duty(&mut self, duty: Self::Duty) -> Result<(), Self::Error>;
}