Files
bare_metal
bit_field
bl602_hal
bl602_pac
aon
acomp0_ctrl.rsacomp1_ctrl.rsacomp_ctrl.rsaon.rsaon_common.rsaon_misc.rsbg_sys_top.rsdcdc18_top_0.rsdcdc18_top_1.rsgpadc_reg_cmd.rsgpadc_reg_config1.rsgpadc_reg_config2.rsgpadc_reg_define.rsgpadc_reg_isr.rsgpadc_reg_raw_result.rsgpadc_reg_result.rsgpadc_reg_scn_neg1.rsgpadc_reg_scn_neg2.rsgpadc_reg_scn_pos1.rsgpadc_reg_scn_pos2.rsgpadc_reg_status.rshbncore_resv0.rshbncore_resv1.rsldo11soc_and_dctest.rspsw_irrcv.rsrf_top_aon.rstsen.rsxtal_cfg.rs
cci
cks
dma
dma_c0config.rsdma_c0control.rsdma_c0dst_addr.rsdma_c0lli.rsdma_c0src_addr.rsdma_c1config.rsdma_c1control.rsdma_c1dst_addr.rsdma_c1lli.rsdma_c1src_addr.rsdma_c2config.rsdma_c2control.rsdma_c2dst_addr.rsdma_c2lli.rsdma_c2src_addr.rsdma_c3config.rsdma_c3control.rsdma_c3dst_addr.rsdma_c3lli.rsdma_c3src_addr.rsdma_enbld_chns.rsdma_int_err_clr.rsdma_int_error_status.rsdma_int_status.rsdma_int_tcclear.rsdma_int_tcstatus.rsdma_raw_int_error_status.rsdma_raw_int_tcstatus.rsdma_soft_breq.rsdma_soft_lbreq.rsdma_soft_lsreq.rsdma_soft_sreq.rsdma_sync.rsdma_top_config.rs
ef_ctrl
ef_data_0
ef_ana_trim_0.rsef_cfg_0.rsef_data_0_lock.rsef_dbg_pwd_high.rsef_dbg_pwd_low.rsef_key_slot_0_w0.rsef_key_slot_0_w1.rsef_key_slot_0_w2.rsef_key_slot_0_w3.rsef_key_slot_1_w0.rsef_key_slot_1_w1.rsef_key_slot_1_w2.rsef_key_slot_1_w3.rsef_key_slot_2_w0.rsef_key_slot_2_w1.rsef_key_slot_2_w2.rsef_key_slot_2_w3.rsef_key_slot_3_w0.rsef_key_slot_3_w1.rsef_key_slot_3_w2.rsef_key_slot_3_w3.rsef_key_slot_4_w0.rsef_key_slot_4_w1.rsef_key_slot_4_w2.rsef_key_slot_4_w3.rsef_key_slot_5_w0.rsef_key_slot_5_w1.rsef_key_slot_5_w2.rsef_key_slot_5_w3.rsef_sw_usage_0.rsef_wifi_mac_high.rsef_wifi_mac_low.rs
ef_data_1
reg_data_1_lock.rsreg_key_slot_10_w0.rsreg_key_slot_10_w1.rsreg_key_slot_10_w2.rsreg_key_slot_10_w3.rsreg_key_slot_11_w0.rsreg_key_slot_11_w1.rsreg_key_slot_11_w2.rsreg_key_slot_11_w3.rsreg_key_slot_6_w0.rsreg_key_slot_6_w1.rsreg_key_slot_6_w2.rsreg_key_slot_6_w3.rsreg_key_slot_7_w0.rsreg_key_slot_7_w1.rsreg_key_slot_7_w2.rsreg_key_slot_7_w3.rsreg_key_slot_8_w0.rsreg_key_slot_8_w1.rsreg_key_slot_8_w2.rsreg_key_slot_8_w3.rsreg_key_slot_9_w0.rsreg_key_slot_9_w1.rsreg_key_slot_9_w2.rsreg_key_slot_9_w3.rs
glb
bmx_cfg1.rsbmx_cfg2.rsbmx_dbg_out.rsbmx_err_addr.rscgen_cfg0.rscgen_cfg1.rscgen_cfg2.rscgen_cfg3.rsclk_cfg0.rsclk_cfg1.rsclk_cfg2.rsclk_cfg3.rscpu_clk_cfg.rsdbg_sel_hh.rsdbg_sel_hl.rsdbg_sel_lh.rsdbg_sel_ll.rsdebug.rsdig32k_wakeup_ctrl.rsglb_parm.rsgpadc_32m_src_ctrl.rsgpdac_actrl.rsgpdac_bctrl.rsgpdac_ctrl.rsgpdac_data.rsgpio_cfgctl0.rsgpio_cfgctl1.rsgpio_cfgctl10.rsgpio_cfgctl11.rsgpio_cfgctl12.rsgpio_cfgctl13.rsgpio_cfgctl14.rsgpio_cfgctl2.rsgpio_cfgctl3.rsgpio_cfgctl30.rsgpio_cfgctl31.rsgpio_cfgctl32.rsgpio_cfgctl33.rsgpio_cfgctl34.rsgpio_cfgctl35.rsgpio_cfgctl4.rsgpio_cfgctl5.rsgpio_cfgctl6.rsgpio_cfgctl7.rsgpio_cfgctl8.rsgpio_cfgctl9.rsgpio_int_clr1.rsgpio_int_mask1.rsgpio_int_mode_set1.rsgpio_int_mode_set2.rsgpio_int_mode_set3.rsgpio_int_stat1.rsled_driver.rsmbist_ctl.rsmbist_stat.rsrsv0.rsrsv1.rsrsv2.rsrsv3.rsseam_misc.rssram_parm.rssram_ret.rssram_slp.rsswrst_cfg0.rsswrst_cfg1.rsswrst_cfg2.rsswrst_cfg3.rstzc_glb_ctrl_0.rstzc_glb_ctrl_1.rstzc_glb_ctrl_2.rstzc_glb_ctrl_3.rsuart_sig_sel_0.rswifi_bt_coex_ctrl.rs
gpip
hbn
i2c
ir
irrx_config.rsirrx_data_count.rsirrx_data_word0.rsirrx_data_word1.rsirrx_int_sts.rsirrx_pw_config.rsirrx_swm_fifo_config_0.rsirrx_swm_fifo_rdata.rsirtx_config.rsirtx_data_word0.rsirtx_data_word1.rsirtx_int_sts.rsirtx_pulse_width.rsirtx_pw.rsirtx_swm_pw_0.rsirtx_swm_pw_1.rsirtx_swm_pw_2.rsirtx_swm_pw_3.rsirtx_swm_pw_4.rsirtx_swm_pw_5.rsirtx_swm_pw_6.rsirtx_swm_pw_7.rs
l1c
pds
pwm
pwm0_clkdiv.rspwm0_config.rspwm0_interrupt.rspwm0_period.rspwm0_thre1.rspwm0_thre2.rspwm1_clkdiv.rspwm1_config.rspwm1_interrupt.rspwm1_period.rspwm1_thre1.rspwm1_thre2.rspwm2_clkdiv.rspwm2_config.rspwm2_interrupt.rspwm2_period.rspwm2_thre1.rspwm2_thre2.rspwm3_clkdiv.rspwm3_config.rspwm3_interrupt.rspwm3_period.rspwm3_thre1.rspwm3_thre2.rspwm4_clkdiv.rspwm4_config.rspwm4_interrupt.rspwm4_period.rspwm4_thre1.rspwm4_thre2.rspwm_int_config.rs
rf
adda1.rsadda2.rsadda_reg_ctrl_hw.rscip.rsdfe_ctrl_0.rsdfe_ctrl_1.rsdfe_ctrl_10.rsdfe_ctrl_11.rsdfe_ctrl_12.rsdfe_ctrl_13.rsdfe_ctrl_14.rsdfe_ctrl_15.rsdfe_ctrl_16.rsdfe_ctrl_17.rsdfe_ctrl_18.rsdfe_ctrl_2.rsdfe_ctrl_3.rsdfe_ctrl_4.rsdfe_ctrl_5.rsdfe_ctrl_6.rsdfe_ctrl_7.rsdfe_ctrl_8.rsdfe_ctrl_9.rsfbdv.rslna.rslna_ctrl_hw_mux.rslo.rslo_cal_ctrl_hw1.rslo_cal_ctrl_hw10.rslo_cal_ctrl_hw11.rslo_cal_ctrl_hw2.rslo_cal_ctrl_hw3.rslo_cal_ctrl_hw4.rslo_cal_ctrl_hw5.rslo_cal_ctrl_hw6.rslo_cal_ctrl_hw7.rslo_cal_ctrl_hw8.rslo_cal_ctrl_hw9.rslo_reg_ctrl_hw1.rslo_sdm_ctrl_hw1.rslo_sdm_ctrl_hw2.rslo_sdm_ctrl_hw3.rslo_sdm_ctrl_hw4.rslo_sdm_ctrl_hw5.rslo_sdm_ctrl_hw6.rslo_sdm_ctrl_hw7.rslo_sdm_ctrl_hw8.rslodist.rspa1.rspa2.rspa_reg_ctrl_hw1.rspa_reg_ctrl_hw2.rspa_reg_wifi_ctrl_hw.rspfdcp.rspmip_mv2aon.rsppu_ctrl_hw.rspucr1.rspucr1_hw.rspucr2.rspucr2_hw.rspud_ctrl_hw.rsrbb1.rsrbb2.rsrbb3.rsrbb4.rsrbb_bw_ctrl_hw.rsrbb_gain_index1.rsrbb_gain_index2.rsrbb_gain_index3.rsrbb_gain_index4.rsrbb_gain_index5.rsrf_base_ctrl1.rsrf_base_ctrl2.rsrf_data_temp_0.rsrf_data_temp_1.rsrf_data_temp_2.rsrf_data_temp_3.rsrf_fsm_ctrl0.rsrf_fsm_ctrl1.rsrf_fsm_ctrl2.rsrf_fsm_ctrl_hw.rsrf_fsm_ctrl_sw.rsrf_ical_ctrl0.rsrf_ical_ctrl1.rsrf_ical_ctrl2.rsrf_pkdet_ctrl0.rsrf_resv_reg_0.rsrf_resv_reg_1.rsrf_resv_reg_2.rsrf_rev.rsrf_sram_ctrl0.rsrf_sram_ctrl1.rsrf_sram_ctrl2.rsrf_sram_ctrl3.rsrf_sram_ctrl4.rsrf_sram_ctrl5.rsrf_sram_ctrl6.rsrfcal_ctrlen.rsrfcal_stateen.rsrfcal_status.rsrfcal_status2.rsrfctrl_hw_en.rsrfif_dfe_ctrl0.rsrfif_dig_ctrl.rsrfif_test_read.rsrmxgm.rsrosdac_ctrl_hw1.rsrosdac_ctrl_hw2.rsrrf_gain_index1.rsrrf_gain_index2.rsrxiq_ctrl_hw1.rsrxiq_ctrl_hw2.rsrxiq_ctrl_hw3.rsrxiq_ctrl_hw4.rssaradc_resv.rssdm1.rssdm2.rssdm3.rssingen_ctrl0.rssingen_ctrl1.rssingen_ctrl2.rssingen_ctrl3.rssingen_ctrl4.rstbb.rstbb_gain_index1.rstbb_gain_index2.rstbb_gain_index3.rstbb_gain_index4.rstemp_comp.rsten_ac.rsten_dc.rsten_dig.rstmx.rstosdac_ctrl_hw1.rstosdac_ctrl_hw2.rstosdac_ctrl_hw3.rstosdac_ctrl_hw4.rstrx_gain1.rstrx_gain_hw.rstx_iq_gain_hw0.rstx_iq_gain_hw1.rstx_iq_gain_hw2.rstx_iq_gain_hw3.rstx_iq_gain_hw4.rstx_iq_gain_hw5.rstx_iq_gain_hw6.rstx_iq_gain_hw7.rsvco1.rsvco2.rsvco3.rsvco4.rs
sec_dbg
sec_eng
se_aes_0_ctrl.rsse_aes_0_ctrl_prot.rsse_aes_0_endian.rsse_aes_0_iv_0.rsse_aes_0_iv_1.rsse_aes_0_iv_2.rsse_aes_0_iv_3.rsse_aes_0_key_0.rsse_aes_0_key_1.rsse_aes_0_key_2.rsse_aes_0_key_3.rsse_aes_0_key_4.rsse_aes_0_key_5.rsse_aes_0_key_6.rsse_aes_0_key_7.rsse_aes_0_key_sel_0.rsse_aes_0_key_sel_1.rsse_aes_0_link.rsse_aes_0_mda.rsse_aes_0_msa.rsse_aes_0_sboot.rsse_aes_0_status.rsse_cdet_0_ctrl_0.rsse_cdet_0_ctrl_1.rsse_cdet_0_ctrl_prot.rsse_ctrl_prot_rd.rsse_ctrl_reserved_0.rsse_ctrl_reserved_1.rsse_ctrl_reserved_2.rsse_gmac_0_ctrl_0.rsse_gmac_0_ctrl_prot.rsse_gmac_0_lca.rsse_gmac_0_status.rsse_pka_0_ctrl_0.rsse_pka_0_ctrl_1.rsse_pka_0_ctrl_prot.rsse_pka_0_rw.rsse_pka_0_rw_burst.rsse_pka_0_seed.rsse_sha_0_ctrl.rsse_sha_0_ctrl_prot.rsse_sha_0_endian.rsse_sha_0_hash_h_0.rsse_sha_0_hash_h_1.rsse_sha_0_hash_h_2.rsse_sha_0_hash_h_3.rsse_sha_0_hash_h_4.rsse_sha_0_hash_h_5.rsse_sha_0_hash_h_6.rsse_sha_0_hash_h_7.rsse_sha_0_hash_l_0.rsse_sha_0_hash_l_1.rsse_sha_0_hash_l_2.rsse_sha_0_hash_l_3.rsse_sha_0_hash_l_4.rsse_sha_0_hash_l_5.rsse_sha_0_hash_l_6.rsse_sha_0_hash_l_7.rsse_sha_0_link.rsse_sha_0_msa.rsse_sha_0_status.rsse_trng_0_ctrl_0.rsse_trng_0_ctrl_1.rsse_trng_0_ctrl_2.rsse_trng_0_ctrl_3.rsse_trng_0_ctrl_prot.rsse_trng_0_dout_0.rsse_trng_0_dout_1.rsse_trng_0_dout_2.rsse_trng_0_dout_3.rsse_trng_0_dout_4.rsse_trng_0_dout_5.rsse_trng_0_dout_6.rsse_trng_0_dout_7.rsse_trng_0_status.rsse_trng_0_test.rsse_trng_0_test_out_0.rsse_trng_0_test_out_1.rsse_trng_0_test_out_2.rsse_trng_0_test_out_3.rs
sf_ctrl
sf2_if_io_dly_0.rssf2_if_io_dly_1.rssf2_if_io_dly_2.rssf2_if_io_dly_3.rssf2_if_io_dly_4.rssf3_if_io_dly_0.rssf3_if_io_dly_1.rssf3_if_io_dly_2.rssf3_if_io_dly_3.rssf3_if_io_dly_4.rssf_aes.rssf_aes_cfg_r0.rssf_aes_iv_r0_w0.rssf_aes_iv_r0_w1.rssf_aes_iv_r0_w2.rssf_aes_iv_r0_w3.rssf_aes_iv_r1_w0.rssf_aes_iv_r1_w1.rssf_aes_iv_r1_w2.rssf_aes_iv_r1_w3.rssf_aes_iv_r2_w0.rssf_aes_iv_r2_w1.rssf_aes_iv_r2_w2.rssf_aes_iv_r2_w3.rssf_aes_key_r0_0.rssf_aes_key_r0_1.rssf_aes_key_r0_2.rssf_aes_key_r0_3.rssf_aes_key_r0_4.rssf_aes_key_r0_5.rssf_aes_key_r0_6.rssf_aes_key_r0_7.rssf_aes_key_r1_0.rssf_aes_key_r1_1.rssf_aes_key_r1_2.rssf_aes_key_r1_3.rssf_aes_key_r1_4.rssf_aes_key_r1_5.rssf_aes_key_r1_6.rssf_aes_key_r1_7.rssf_aes_key_r2_0.rssf_aes_key_r2_1.rssf_aes_key_r2_2.rssf_aes_key_r2_3.rssf_aes_key_r2_4.rssf_aes_key_r2_5.rssf_aes_key_r2_6.rssf_aes_key_r2_7.rssf_aes_r1.rssf_aes_r2.rssf_ahb2sif_status.rssf_ctrl_0.rssf_ctrl_1.rssf_ctrl_2.rssf_ctrl_3.rssf_ctrl_prot_en.rssf_ctrl_prot_en_rd.rssf_id0_offset.rssf_id1_offset.rssf_if_iahb_0.rssf_if_iahb_1.rssf_if_iahb_2.rssf_if_iahb_3.rssf_if_iahb_4.rssf_if_iahb_5.rssf_if_iahb_6.rssf_if_iahb_7.rssf_if_io_dly_0.rssf_if_io_dly_1.rssf_if_io_dly_2.rssf_if_io_dly_3.rssf_if_io_dly_4.rssf_if_sahb_0.rssf_if_sahb_1.rssf_if_sahb_2.rssf_if_status_0.rssf_if_status_1.rssf_reserved.rs
spi
timer
tzc_nsec
tzc_sec
uart
bl602_rust_guide
embedded_hal
embedded_time
nb
num
num_complex
num_integer
num_iter
num_rational
num_traits
panic_halt
r0
riscv
register
fcsr.rshpmcounterx.rsmacros.rsmarchid.rsmcause.rsmcycle.rsmcycleh.rsmepc.rsmhartid.rsmhpmcounterx.rsmhpmeventx.rsmideleg.rsmie.rsmimpid.rsminstret.rsminstreth.rsmip.rsmisa.rsmod.rsmscratch.rsmstatus.rsmtval.rsmtvec.rsmvendorid.rspmpaddrx.rspmpcfgx.rssatp.rsscause.rssepc.rssie.rssip.rssscratch.rssstatus.rsstval.rsstvec.rstime.rstimeh.rsucause.rsuepc.rsuie.rsuip.rsuscratch.rsustatus.rsutval.rsutvec.rs
riscv_rt
vcell
>
1 2 3 4 5 6 7 8 9 10 11 12 13 14
#![no_std] pub use bl602_pac as pac; pub mod clock; pub mod gpio; pub mod serial; /// HAL crate prelude pub mod prelude { pub use crate::gpio::GlbExt as _bl602_hal_gpio_GlbExt; pub use embedded_hal::prelude::*; pub use embedded_time::rate::Extensions; }