1
  2
  3
  4
  5
  6
  7
  8
  9
 10
 11
 12
 13
 14
 15
 16
 17
 18
 19
 20
 21
 22
 23
 24
 25
 26
 27
 28
 29
 30
 31
 32
 33
 34
 35
 36
 37
 38
 39
 40
 41
 42
 43
 44
 45
 46
 47
 48
 49
 50
 51
 52
 53
 54
 55
 56
 57
 58
 59
 60
 61
 62
 63
 64
 65
 66
 67
 68
 69
 70
 71
 72
 73
 74
 75
 76
 77
 78
 79
 80
 81
 82
 83
 84
 85
 86
 87
 88
 89
 90
 91
 92
 93
 94
 95
 96
 97
 98
 99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
#[doc = "Register `rxiq_ctrl_hw3` reader"]
pub struct R(crate::R<RXIQ_CTRL_HW3_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<RXIQ_CTRL_HW3_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::convert::From<crate::R<RXIQ_CTRL_HW3_SPEC>> for R {
    fn from(reader: crate::R<RXIQ_CTRL_HW3_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Register `rxiq_ctrl_hw3` writer"]
pub struct W(crate::W<RXIQ_CTRL_HW3_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<RXIQ_CTRL_HW3_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl core::convert::From<crate::W<RXIQ_CTRL_HW3_SPEC>> for W {
    fn from(writer: crate::W<RXIQ_CTRL_HW3_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Field `rx_iq_gain_comp_gc2` reader - "]
pub struct RX_IQ_GAIN_COMP_GC2_R(crate::FieldReader<u16, u16>);
impl RX_IQ_GAIN_COMP_GC2_R {
    pub(crate) fn new(bits: u16) -> Self {
        RX_IQ_GAIN_COMP_GC2_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for RX_IQ_GAIN_COMP_GC2_R {
    type Target = crate::FieldReader<u16, u16>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `rx_iq_gain_comp_gc2` writer - "]
pub struct RX_IQ_GAIN_COMP_GC2_W<'a> {
    w: &'a mut W,
}
impl<'a> RX_IQ_GAIN_COMP_GC2_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u16) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x07ff << 16)) | (((value as u32) & 0x07ff) << 16);
        self.w
    }
}
#[doc = "Field `rx_iq_phase_comp_gc2` reader - "]
pub struct RX_IQ_PHASE_COMP_GC2_R(crate::FieldReader<u16, u16>);
impl RX_IQ_PHASE_COMP_GC2_R {
    pub(crate) fn new(bits: u16) -> Self {
        RX_IQ_PHASE_COMP_GC2_R(crate::FieldReader::new(bits))
    }
}
impl core::ops::Deref for RX_IQ_PHASE_COMP_GC2_R {
    type Target = crate::FieldReader<u16, u16>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
#[doc = "Field `rx_iq_phase_comp_gc2` writer - "]
pub struct RX_IQ_PHASE_COMP_GC2_W<'a> {
    w: &'a mut W,
}
impl<'a> RX_IQ_PHASE_COMP_GC2_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u16) -> &'a mut W {
        self.w.bits = (self.w.bits & !0x03ff) | ((value as u32) & 0x03ff);
        self.w
    }
}
impl R {
    #[doc = "Bits 16:26"]
    #[inline(always)]
    pub fn rx_iq_gain_comp_gc2(&self) -> RX_IQ_GAIN_COMP_GC2_R {
        RX_IQ_GAIN_COMP_GC2_R::new(((self.bits >> 16) & 0x07ff) as u16)
    }
    #[doc = "Bits 0:9"]
    #[inline(always)]
    pub fn rx_iq_phase_comp_gc2(&self) -> RX_IQ_PHASE_COMP_GC2_R {
        RX_IQ_PHASE_COMP_GC2_R::new((self.bits & 0x03ff) as u16)
    }
}
impl W {
    #[doc = "Bits 16:26"]
    #[inline(always)]
    pub fn rx_iq_gain_comp_gc2(&mut self) -> RX_IQ_GAIN_COMP_GC2_W {
        RX_IQ_GAIN_COMP_GC2_W { w: self }
    }
    #[doc = "Bits 0:9"]
    #[inline(always)]
    pub fn rx_iq_phase_comp_gc2(&mut self) -> RX_IQ_PHASE_COMP_GC2_W {
        RX_IQ_PHASE_COMP_GC2_W { w: self }
    }
    #[doc = "Writes raw bits to the register."]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "rxiq_ctrl_hw3.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxiq_ctrl_hw3](index.html) module"]
pub struct RXIQ_CTRL_HW3_SPEC;
impl crate::RegisterSpec for RXIQ_CTRL_HW3_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [rxiq_ctrl_hw3::R](R) reader structure"]
impl crate::Readable for RXIQ_CTRL_HW3_SPEC {
    type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [rxiq_ctrl_hw3::W](W) writer structure"]
impl crate::Writable for RXIQ_CTRL_HW3_SPEC {
    type Writer = W;
}
#[doc = "`reset()` method sets rxiq_ctrl_hw3 to value 0"]
impl crate::Resettable for RXIQ_CTRL_HW3_SPEC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}