Struct bl602_sdk::uart::uart_reg__bindgen_ty_14__bindgen_ty_1

#[repr(C)]
#[repr(align(4))]
pub struct uart_reg__bindgen_ty_14__bindgen_ty_1 {
    pub _bitfield_align_1: [u32; 0],
    pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4]>,
}

Fields

_bitfield_align_1: [u32; 0]

_bitfield_1: __BindgenBitfieldUnit<[u8; 4]>

Implementations

impl uart_reg__bindgen_ty_14__bindgen_ty_1

pub fn uart_dma_tx_en(&self) -> u32

pub fn set_uart_dma_tx_en(&mut self, val: u32)

pub fn uart_dma_rx_en(&self) -> u32

pub fn set_uart_dma_rx_en(&mut self, val: u32)

pub fn tx_fifo_clr(&self) -> u32

pub fn set_tx_fifo_clr(&mut self, val: u32)

pub fn rx_fifo_clr(&self) -> u32

pub fn set_rx_fifo_clr(&mut self, val: u32)

pub fn tx_fifo_overflow(&self) -> u32

pub fn set_tx_fifo_overflow(&mut self, val: u32)

pub fn tx_fifo_underflow(&self) -> u32

pub fn set_tx_fifo_underflow(&mut self, val: u32)

pub fn rx_fifo_overflow(&self) -> u32

pub fn set_rx_fifo_overflow(&mut self, val: u32)

pub fn rx_fifo_underflow(&self) -> u32

pub fn set_rx_fifo_underflow(&mut self, val: u32)

pub fn reserved_8_31(&self) -> u32

pub fn set_reserved_8_31(&mut self, val: u32)

pub fn new_bitfield_1(
    uart_dma_tx_en: u32,
    uart_dma_rx_en: u32,
    tx_fifo_clr: u32,
    rx_fifo_clr: u32,
    tx_fifo_overflow: u32,
    tx_fifo_underflow: u32,
    rx_fifo_overflow: u32,
    rx_fifo_underflow: u32,
    reserved_8_31: u32
) -> __BindgenBitfieldUnit<[u8; 4]>

Trait Implementations

impl Clone for uart_reg__bindgen_ty_14__bindgen_ty_1

fn clone(&self) -> uart_reg__bindgen_ty_14__bindgen_ty_1

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for uart_reg__bindgen_ty_14__bindgen_ty_1

fn default() -> uart_reg__bindgen_ty_14__bindgen_ty_1

Returns the “default value” for a type.

impl Copy for uart_reg__bindgen_ty_14__bindgen_ty_1